Texas Instruments Computer Hardware TPS650231EVM User Manual

User's Guide  
SLVU394October 2010  
TPS65023B/TPS650231EVM  
The characteristics, operation, and use of the TPS65023B/TPS650231EVM-664 evaluation module (EVM)  
are described in this document. This EVM is designed to help the user evaluate and test the various  
operating modes of the TPS65023B/TPS650231. This user’s guide includes setup instructions for the  
hardware and software, a schematic diagram, a bill of materials, and PCB layout drawings for the  
evaluation module.  
Contents  
1
2
3
4
5
Introduction .................................................................................................................. 1  
Electrical Performance Specification ..................................................................................... 2  
Input/Output Connector Description ...................................................................................... 3  
Board Layout ................................................................................................................ 6  
Schematic and Bill of Materials .......................................................................................... 11  
List of Figures  
1
2
3
4
5
6
Assembly Layer .............................................................................................................  
Top Layer Routing ..........................................................................................................  
Layer-2 Routing, GND Plane ..............................................................................................  
Layer-3 Routing, Vin Plane ................................................................................................  
Bottom Layer Routing..................................................................................................... 10  
TPS65023B/TPS650231EVM-664 Schematic......................................................................... 11  
List of Tables  
1
2
3
4
EVM Ordering Options .....................................................................................................  
Default LDO Output Voltages TPS65023B ..............................................................................  
Default LDO Output Voltages TPS650231 ..............................................................................  
TPS65023B/TPS650231EVM-664 Bill of Materials ................................................................... 12  
1
Introduction  
The Texas Instruments TPS65023B/TPS650231EVM is an integrated power management integrated  
circuit (IC) for applications that are powered with one Li-ion or Li-polymer cell and require multiple power  
rails. The TPS65023B/TPS650231 contains three highly efficient switching step-down converters, two  
LDOs, and additional status and I/O pins. The device is controlled via an I2C interface (HPA172).  
1.1 Requirements  
In order for this EVM to operate properly, the following components must be connected and properly  
configured.  
1.1.1  
Personal Computer  
A personal computer with a USB port is required to operate this EVM. The TPS65023B/TPS650231  
interface software, which is run on the personal computer (PC), communicates with the EVM via the PC  
USB port. The user sends commands to the EVM as well as reads the contents of the  
TPS65023B/TPS650231 internal registers through the USB port.  
1
SLVU394October 2010  
TPS65023B/TPS650231EVM  
Copyright © 2010, Texas Instruments Incorporated  
 
 
Input/Output Connector Description  
3
Input/Output Connector Description  
This section describes the jumpers and connectors on the EVM, as well as how to properly connect, set  
up, and use the TPS65023B/TPS650231EVM-664.  
J1 – VIN  
Input voltage from external power supply, recommended maximum 5.5 V. Input current depends  
on load but typically is less than 2 A.  
J2 – GND  
This is the return connection for VIN.  
J3 – VINLDO/GND  
Input voltage and return for LDO1 and LDO2. Resistor R20 connects this pin to VIN. If an  
external power supply is used, remove R20. Recommended maximum input voltage is 5.5 V.  
J4 – VSYSIN/GND  
Input voltage and return for VSYSIN, one of the input voltages for RTC. Resistor R21 can be  
used to connect this input to VIN. If an external power supply is used, remove R21.  
Recommended maximum input voltage is 4 V.  
J5 – VBACKUP/GND  
Input voltage and return for VBACKUP, one of the input voltages for RTC. There are no onboard  
connections to a voltage input. Recommended maximum input voltage is 4 V.  
J6 – VRTC/GND  
Output voltage from RTC circuit.  
J7 – Fault Outputs  
Four fault outputs are available on this connector:  
PWRFAIL – Fault occurs when input voltage is less than 3 V. Pulled up to VRTC when safe; low  
for fail.  
INT – Fault occurs when a fail is on an input or output voltage; acts as a sum fail. Pulled up to  
VIN when safe; low for fail.  
RESPWRON – Low reset signal is controlled by SW1, 144 ms. Pulled up to VIN normally.  
LOWBAT – Fault occurs when input voltage is less than 3.6 V. Pulled up to VIN when safe; low  
for fail.  
J8 – I2C  
This header duplicates the I2C signals from the J20 interface connector. I2C data (SDA) and  
clock (SCL) can be accessed on this header  
J9 – VDCDC1  
Output from DCDC1 switching regulator maximum output current 1.7 A; default voltage setting is  
3.3 V.  
J10 – GND  
Return for VDCDC1.  
J11 – VDCDC2  
Output from DCDC2 switching regulator; maximum output current 1.2 A.  
J12 – GND  
Return for VDCDC2  
J13 – VLDO1  
Output from low-dropout regulator VLDO1; maximum output current 200 mA.  
J14 – GND  
Return for VLDO1  
J15 – VLDO2  
Output from low-dropout regulator VLDO2; maximum output current 200 mA.  
J16 – GND  
Return for VLDO2.  
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SLVU394October 2010  
TPS65023B/TPS650231EVM  
Copyright © 2010, Texas Instruments Incorporated  
 
 
Input/Output Connector Description  
J17 – VDCDC3  
Output from switching regulator DCDC3; maximum output current 1 A.  
J18– GND  
Return for VDCDC3.  
J19 –  
J19 is the interface connector for the I2C interface. Connect a 10-pin ribbon cable between J13  
and the USB-to-GPIO interface.  
JP1 – DEF1  
Sets default voltage for DCDC1, 1.2 V or 1.6 V.  
JP2 – DEF2  
Sets default voltage for DCDC2, 3.3 V or 1.8 V, in TPS65023B (HPA664-001) configuration. In  
the TPS650231, no default output voltage options are available. In this case, the output voltage  
is adjustable with an external voltage divider R3, R2. The default setup is 1.2 V in the factory  
EVM (HPA664-002) configuration. See section x for advanced voltage scaling options..  
JP3 – DEF3  
Sets default voltage for DCDC3, 3.3 V or 1.8 V.  
JP4 – DCDC1 ON/OFF  
EN for DCDC1 converter; default setting is ON  
JP5 – DCDC2 ON/OFF  
EN for DCDC2 converter; default setting is ON.  
JP6 – DCDC3 ON/OFF  
EN for DCDC3 converter; default setting is ON.  
JP7 – LDO ON/OFF  
EN for both LDO1 and LDO2 regulators; default setting is ON.  
JP8 – DEFLDO1  
Sets default voltage for LDO1 and LDO2 in combination with DEFLDO2. (See Table 2 for  
TPS65023B and Table 3 for TPS650231 - defaults LDO output voltages.)  
JP9 – DEFLDO2  
Sets default voltage for LDO1 and LDO2 in combination with DEFLDO1. (See Table 2 for  
TPS65023B and Table 3 for TPS650231 - defaults LDO output voltages.)  
S1 – HOT_RST  
S1 is a normally open, momentary pushbutton switch that, when pressed, connects the  
HOT_RST input of the TPS650231 to GND, generating the HOT_RESET pulse. HOT_RESET  
pin is pulled up externally.  
3.1 Setup  
The following steps must be followed before the EVM can be operated.  
1. Install the TPS65023B/TPS650231EVM software.  
2. Connect input voltages and loads to the EVM.  
3. Configure all EVM jumpers to factory setting.  
JP4–ON  
JP2–1.8V  
JP7–ON  
JP1–1.6V  
JP5–ON  
JP9–High  
JP3–1.8V  
JP6–ON  
JP8–High  
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TPS65023B/TPS650231EVM  
SLVU394October 2010  
Copyright © 2010, Texas Instruments Incorporated  
 
Input/Output Connector Description  
4. Connect the ribbon cable between the EVM and the USB-TO-GPIO (HPA172) adapter.  
5. Connect the USB cable between the computer and the HPA172EVM.  
6. Turn on all supplies.  
7. Run the TPS65023B/TPS650231EVM software  
3.2 Modifications  
3.2.1  
Setting the Output Voltage  
The TPS65023B features two default output voltages. These output voltages can be selected by pulling  
DEFDCDC2 high – selecting the higher default output voltage – or pulling DEFDCDC2 low – selecting the  
lower default output voltage.  
In addition, the output voltage of DCDC2 can be externally adjusted with the resistor divider network R3  
and R6. The default configuration of the TPS65023BEVM-664 is that R3 and R6 are not assembled. The  
default output voltage of DCDC2 can be selected with JP2.  
Note that the default output voltage is selected once at startup of the device. Changing logic level of  
DEFDCDC2 during operation does not affect the output voltage and is not allowed.  
3.2.2  
3.2.3  
Setting the Output Voltage for DCDC2, TPS650231  
The TPS650231 does not feature these default output voltages. The output voltages of DCDC2 is  
externally adjustable only. The default configuration of the TPS650231EVM-664 is that R3 and R6 are not  
assembled. JP2 is not assembled.  
TPS650231 does not have the default output voltage feature, and this provides the benefit of external  
voltage scaling options.  
Simple Two-Point Voltage Scaling, TPS650231  
DCDC2 does not have the previously described preset default output voltages. An external voltage scaling  
circuit is on the EVM, and the output voltage of DCDC2 can be switched between two preset voltages.  
This useful feature reduces the power consumption of an application processor in Low Power mode.  
The voltage scaling circuit consists of JP2,Q1, R3, R6, and R24. The circuit uses a transistor (Q1) to  
connect a resistor (R24) in parallel to the lower resistor of the feedback network (R6) of DCDC2.  
Modifying the resistor network by paralleling R24 and R6 reduces the overall resistance of the lower  
resistor and therefore increases the output voltage of the DC/DC converter. See Equation 1 and  
Equation 2 to design R24. In the factory configuration, the components JP2, Q1, and R24 are not  
assembled on the board.  
3.2.4  
Scaling the Output Voltage of DCDC2 From LDO2  
Another approach to scale the DC/DC converter output voltage is to use an external adjustable voltage.  
Any external adjustable voltage source can be used, e.g., output voltage of an digital-to-analog converter.  
In the TPS65023B/TPS650231, LDO1 and LDO2 can be adjusted via I2C. The TPS65023B/TPS650231  
provides the ability to feed the output voltage of LDO2 back to the resistor divider network, using R25, and  
therefore scale the output voltage of DCDC2 based on the LDO2 output voltage.  
In this configuration, R25, R3, and R6 need to be assembled. R24, R26, Q1, and R3 need to be removed.  
R1  
R1  
Vout _DCDC2 = V _REF´(1+  
)) + (V _REF - VLDO2)´(  
)
R2  
R3  
(1)  
From Equation 2 it can be seen that maximum DCDC1 output voltage occurs for minimum VLDO2, and  
minimum DCDC1 output voltage occurs for maximum VLDO2.  
To ensure that the desired DCDC1 output voltages can be adjusted, design the resistors R25, R3, and R6  
according to and Equation 2 and Equation 2.  
5
SLVU394October 2010  
TPS65023B/TPS650231EVM  
Copyright © 2010, Texas Instruments Incorporated  
 
 
Board Layout  
R1  
R1  
Vout _DCDC2,min = V _REF´(1+  
)) + (V _REF - VLDO2,max)´(  
)
R2  
R3  
(2)  
(3)  
R1  
R1  
Vout _DCDC2,max = V _REF´(1+  
)) + (V _REF - VLDO2,min)´(  
)
R2  
R3  
The most straight forward way is to choose a value for R6 according to the recommendations in the  
converter data sheet.  
4
Board Layout  
This section provides the TPS65023B/TPS650231EVM-664 board layout and illustrations.  
4.1 Layout  
Board layout is critical for all switch mode power supplies. Figure 1 through Figure 5 show the board  
layout for the TPS65023B/TPS650231EVM-664 PCB. The nodes with high switching frequencies and  
currents are short and are isolated from the noise-sensitive feedback circuitry. Careful attention has been  
given to the routing of high-frequency current loops. See the data sheet for specific layout guidelines.  
Figure 1. Assembly Layer  
6
TPS65023B/TPS650231EVM  
SLVU394October 2010  
Copyright © 2010, Texas Instruments Incorporated  
 
     
Board Layout  
Figure 2. Top Layer Routing  
7
SLVU394October 2010  
TPS65023B/TPS650231EVM  
Copyright © 2010, Texas Instruments Incorporated  
 
 
Board Layout  
Figure 3. Layer-2 Routing, GND Plane  
8
TPS65023B/TPS650231EVM  
SLVU394October 2010  
Copyright © 2010, Texas Instruments Incorporated  
 
 
Board Layout  
Figure 4. Layer-3 Routing, Vin Plane  
9
SLVU394October 2010  
TPS65023B/TPS650231EVM  
Copyright © 2010, Texas Instruments Incorporated  
 
 
Board Layout  
Figure 5. Bottom Layer Routing  
10  
TPS65023B/TPS650231EVM  
SLVU394October 2010  
Copyright © 2010, Texas Instruments Incorporated  
 
 
Schematic and Bill of Materials  
5
Schematic and Bill of Materials  
This section provides the TPS65023B/TPS650231EVM-664 schematic and bill of materials.  
5.1 Schematic  
Figure 6. TPS65023B/TPS650231EVM-664 Schematic  
11  
SLVU394October 2010  
TPS65023B/TPS650231EVM  
Copyright © 2010, Texas Instruments Incorporated  
 
   
Schematic and Bill of Materials  
5.2 Bill of Materials  
Table 4. TPS65023B/TPS650231EVM-664 Bill of Materials  
Count  
RefDes  
Value  
Description  
Size  
Part Number  
-001  
-002  
9
9
C1, C2, C4, C9, 10 µF  
C10, C11,  
Capacitor, Ceramic, 6.3V, X5R, 10%  
0805  
Std  
C14–C16  
4
1
4
3
0
4
1
4
3
0
C3, C6, C7, C17 1.0 µF  
Capacitor, Ceramic, 6.3V, X5R,10%  
Capacitor, Ceramic, 50V, X7R, 10%  
Capacitor, Ceramic, 6.3V, X5R, 10%  
Inductor, SMT, 2.0A, 110mΩ  
0603  
Std  
C5  
1500 pF  
2.2 µF  
0603  
C1608X7R1H152K  
C1608X5R0J225K  
LPS3015-222ML  
Std  
C8, C18  
L1, L2, L3  
0603  
2.2 µH  
0.157 x 0.157  
0603  
R1, R2, R4–R6, Open  
R17, R18, R21  
Resistor, Chip, 1/16W, 1%  
0
0
6
1
1
6
R3  
R6  
182k  
365k  
100k  
Resistor, Chip, 1/16W, 1%  
Resistor, Chip, 1/16W, 1%  
Resistor, Chip, 1/16W, 1%  
0603  
0603  
0603  
Std  
Std  
Std  
R7, R11–R14,  
R22  
1
1
1
2
2
1
0
1
1
1
2
2
0
1
R8  
10  
Resistor, Chip, 1/16W, 1%  
0603  
0603  
0603  
0603  
0603  
QFN  
QFN  
Std  
R9  
1.20M  
Resistor, Chip, 1/16W, 1%  
Std  
R10  
499k  
Resistor, Chip, 1/16W, 1%  
Std  
R15, R16  
R19, R20  
U1  
4.75k  
Resistor, Chip, 1/16W, 1%  
Std  
0
Resistor, Chip, 1/16W, 5%  
Std  
TPS65023BRSB  
TPS650231RSB  
IC, Power Management IC for Li-Ion Powered Systems  
IC, Power Management IC for Li-Ion Powered Systems  
TPS65023BRSB  
TPS650231RSB  
U1  
5.3 Related Documentation  
TPS650231, Power Management IC For Li-Ion Powered Systems data sheet (SLVSAE3)  
12  
TPS65023B/TPS650231EVM  
SLVU394October 2010  
Copyright © 2010, Texas Instruments Incorporated  
 
 
Evaluation Board/Kit Important Notice  
Texas Instruments (TI) provides the enclosed product(s) under the following conditions:  
This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION  
PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the  
product(s) must have electronics training and observe good engineering practice standards. As such, the goods being provided are  
not intended to be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations,  
including product safety and environmental measures typically found in end products that incorporate such semiconductor  
components or circuit boards. This evaluation board/kit does not fall within the scope of the European Union directives regarding  
electromagnetic compatibility, restricted substances (RoHS), recycling (WEEE), FCC, CE or UL, and therefore may not meet the  
technical requirements of these directives or other related directives.  
Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30  
days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY  
SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING  
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EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER  
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TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not exclusive.  
TI assumes no liability for applications assistance, customer product design, software performance, or infringement of  
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Please read the User’s Guide and, specifically, the Warnings and Restrictions notice in the User’s Guide prior to handling the  
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This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION  
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EVM Warnings and Restrictions  
It is important to operate this EVM within the input voltage range of 3.3 V to 5.5 V and the output voltage range of 0.8 V to 3.3 V .  
Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are  
questions concerning the input range, please contact a TI field representative prior to connecting the input power.  
Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the  
EVM. Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the load  
specification, please contact a TI field representative.  
During normal operation, some circuit components may have case temperatures greater than 60°C. The EVM is designed to  
operate properly with certain components above 60°C as long as the input and output ranges are maintained. These components  
include but are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors. These types of  
devices can be identified using the EVM schematic located in the EVM User's Guide. When placing measurement probes near  
these devices during operation, please be aware that these devices may be very warm to the touch.  
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Copyright © 2010, Texas Instruments Incorporated  
 
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